- Researchers from the Fulda University of Applied Sciences and the GSI Helmholtz Centre for Heavy Ion Research in Darmstadt, Germany, have developed a particle detection method based on a convolutional neural network (CNN) implemented on an FPGA.
- Combined with the Teledyne SP Devices ADQ35 series digitizer, this processing method identifies particle arrival times even when detector pulses overlap, achieving a reported latency of 300 ns and a processing throughput of 120 Gbit/s.
At GSI’s SIS18 synchrotron, controlling the extracted beam—known as the “spill”—requires knowledge of the particle count and their temporal distribution. A detector placed in the beam path generates an electrical pulse as each particle passes. When multiple particles arrive in rapid succession, the pulses overlap. This phenomenon, known as “pile-up,” can alter the signal shape and complicate the identification of individual events.
Conventional methods, such as multi-threshold detection and local maxima searching, may miss some particles in these situations. This undercounting affects beam measurement and can limit the usable intensity during experiments.
To address this issue, the researchers trained a convolutional neural network using annotated data. The model learns to identify individual pulses within the measured signal, even when multiple events overlap. It outputs the number of detected particles as well as their arrival times.
Reported results indicate that this approach enables the processing of beams with high particle rates without the need to reduce intensity to avoid pile-up effects.
Inference integrated directly into the digitizer
Processing is based on the Teledyne SP Devices ADQ35 series digitizer, which samples signals at rates up to 10 GS/s and incorporates an AMD Kintex UltraScale KU115 FPGA.
Implementing the neural network on this component enables data processing close to the point of acquisition, eliminating the need to transfer all samples to an external computer system for inference.
The convolutional neural network (CNN) processes 32 samples in parallel at a frequency of 312.5 MHz, resulting in a throughput of 10 billion samples per second. With a resolution of 12 bits per sample, the data stream reaches 120 Gbit/s. The stated inference latency is 300 ns, featuring deterministic processing suitable for real-time control applications.
The toolchain used to train and deploy the network was developed by UFAIRA to account for the resource and computational constraints inherent to FPGAs. According to the authors, the model utilizes less than 15% of the available DSP resources and less than 6% of the available LUT logic resources on the component. This leaves headroom for additional processing or the implementation of more complex models.
An application for real-time signal processing
This work demonstrates the value of FPGA-based inference when closely spaced events generate signals that are difficult to separate using conventional methods. Local processing combines high throughput, low latency, and deterministic execution—key characteristics for systems that must react during the acquisition process. Beyond particle accelerator instrumentation, this type of architecture could be applied to other high-throughput data processing tasks, such as radio-frequency spectrum monitoring and signal classification.
Doctoral research conducted at Fulda University of Applied Sciences in collaboration with GSI forms the technological foundation of UFAIRA, a company established in 2026 to develop FPGA-based inference accelerators for real-time applications.
